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#gatearray

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Continued thread

After wasting far too much time trying to configure a DMA properly I now have a 4MHz CPU clock on GPIO 0, with 50% duty cycle.

The meter doesn’t report a frequency on the 1MHz signals, but it does show a PWMed voltage. And it shows the 2MHz signals.

I’ll have to dig out the oscilloscope to test properly, but this should be the first stage complete.

I'm having an experiment with a more 'low key' blogging style, closer to posting my development notes compared to my usual in depth articles. Less detailed and less fact checked but, hopefully, more frequent.

Here's my first one on the Pico Garry 2350 project to emulate an Amstrad CPC gate array using an RP2350 chip. Here I summarise the function of each pin of the original gate array: bread80.com/2024/08/11/pico-ga

bread80.comPico Garry 2350 Part 1 – Signals – Bread80.com
Continued thread

As for the display issues, I’m still working on it.

I don’t like the look of the READY signal. This is also /WAIT for the CPU. Schematics show it with an 800R pull up - which I’ve copied. It’s exposed on the expansion connector so I’ve worked it as open collector. But that scope trace suggests the Z80 is pausing to long and clashing with video accesses to RAM, and producing the snow.

I’ll need to reprogram the GreenPAK chip using I2C.

Continued thread

I was having trouble getting the RP2040s into Bootsel mode. It turns out I’d done a rubbish job soldering the Bootsel and reset button.

Not helped by me buying the wrong buttons - I bought recessed ones which need a pen (etc) to push. Holding test probes plus a pen at the same time required some ingenuity.

Reworked them now and working reliably under windows.